This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 2000-298439 filed on Sep. 29, 2000; the entire contents of which are incorporated herein by reference.
1. Field of The Invention
The present invention relates to a semiconductor device and a method of producing the semiconductor device. More specifically, this invention relates to a semiconductor device on which high-speed and low power-consuming transistors, particularly, field-effect transistors having strained silicon (Si) as channels and hetero-junction transistors are integrated.
2. Description of Related Art
In an npn bipolar transistor, hetero-bipolar transistors (HBTs) having a semiconductor material with a bandgap width wider than that of the base have been known for enhanced electron injection efficiency in which reverse injection of hole from the base to the emitter is restricted. Particularly, AlGaAs/GaAs HBTs have excellent reverse injection of hole restriction efficiency due to a band discontinuity of a valence band larger than that of a conduction band between the emitter and the base.
As bipolar transistors including Si, already produced are HBTs having strained SiGe, for the base layer, with a bandgap width narrower than that of Si. Such an HBT is shown in FIG. 16A. An energy band structure for the main components of the HBT is shown in FIG. 16B.
As shown in FIG. 16A, in the HBT, a collector section 102 is formed on an Si substrate. An SiGe crystal layer 104 is formed on the collector section 102 as a base layer by a thin-film deposition technique such as LPCVD (Low pressure Chemical Vapor Deposition). Laminated on the SiGe crystal layer 104 are an insulating film 105 having an opening, and an Si layer 106 as emitter via the insulating layer 105. This structure is a double-hetero structure with base-emitter and base-collector hetero-junctions.
As apparent from FIG. 16B, this double-hetero structure could cause a slow operating speed due to charge-up occurring on the base-collector side during large-current injection.
The major advantage of such HBTs having thin SiGe-film layers is that a complex structure with Si-CMOSFETs is designed easier than HBTs composed of GaAs-compound semiconductors. For instance, one achievement according to the advantage is a complex element having high-frequency (analog) circuitry with HBTs for high-output current gain and Si-CMOS logic circuitry.
It is known that mobility of electrons or holes is enhanced with a modulated-band structure due to stress applied to Si or SiGe crystals. There are several proposals on element structures or announcement on sample elements that have taught electron and hole mobility of two times or more for a strained Si layer formed on lattice-relaxed SiGe crystals.
A known method of producing an FET using a strained Si layer is to grow an SiGe layer having Ge composition in the range from 20% to 30% on a general Si substrate to form a lattice-relaxed SiGe layer (virtual substrate), with an Si layer thinner than the critical film thickness laminated thereon. The strained Si layer exposed to the substrate surface in this structure allows experimental production of an MOSFET with procedures similar to those for known Si-MOSFETS.
As explained, one achievement is a complex element with HBTs having thin SiGe-base layers formed on Si substrates and known Si-CMOSs. Also proposed is an FET having an SiGe layer as a virtual substrate grown thick on an Si substrate by using strained Si.
It is, however, difficult to produce a complex element having CMOSs or HBTs with SiGe layers as virtual substrates grown thick on Si substrates due to difficulty in element isolation when multiple number of these elements are integrated.
A purpose of the present invention is, in view of the problems discussed above, to provide a structure and a method for a complex element having HBTS and MOSFETs using strained Si on lattice-relaxed SiGe crystals.
In order to fulfil the purpose, an aspect of the present invention employs a complex structure in which an MOSFET having a thin-film SiGe buffer layer and a strained Si channel laminated on an insulating film and an HBT having an SiGe base layer formed on a thin-film SiGe layer by epitaxial growth and an Si emitter layer formed on the SiGe base layer are combined with each other.
It is preferable that the thin-film SiGe layer formed on the insulating film of the MOSFET is made thinner than the counterpart of the HBT. It is also preferable that the thin-film SiGe layer formed on the insulating film of the MOSFET has Ge concentration higher than that of the counterpart of the HBT.
A semiconductor device according to another aspect of the present invention comprises: a insulating layer; a field effect transistor including a buffer layer composed of a first semiconductor, formed on the insulating layer, and a strained semiconductor layer composed of a second semiconductor having a lattice constant smaller than that of the first semiconductor, formed on the buffer layer, the strained semiconductor layer being provided with a channel area, a source area and a drain area; and a bipolar transistor including a collector layer composed of a third semiconductor, formed on the insulating layer, a base layer composed of a fourth semiconductor having a lattice constant about the same as or larger than that of the third semiconductor, formed on the collector layer, and an emitter layer composed of a fifth semiconductor having a lattice constant smaller than those of the third and fourth semiconductors formed on the base layer.
A method of producing the above-described semiconductor device according to an aspect of the present invention comprises: forming a wafer having an insulating layer and a semiconductor layer involving silicon and germanium formed on the insulating layer; oxidizing a first portion of the semiconductor layer from the surface of the semiconductor layer to form an oxide film to increase Ge concentration of the semiconductor layer remaining under the oxide film; forming the field effect transistor with the semiconductor layer, of which the Ge concentration has been increased as the buffer layer; and forming the bipolar transistor on a second portion except the first portion of the semiconductor layer, the bipolar transistor having a semiconductor layer portion as the collector layer on which the oxide film has not been formed.
A method of producing a semiconductor device according another aspect of the present invention comprises: forming a wafer having an insulating layer and a semiconductor layer involving silicon and germanium formed on the insulating film; oxidizing a first portion of the semiconductor layer from the surface of the semiconductor layer to form an oxide film to increase Ge concentration of the semiconductor layer remaining under the oxide film; forming an field effect transistor with the semiconductor layer of which the Ge concentration has been increased as a buffer layer; and forming a bipolar transistor on second portion except the first portion of the semiconductor layer, the bipolar transistor having a semiconductor layer portion as a collector layer on which the oxide film has not been formed.